Localized data block destaging
US11055001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2018 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Apr 9, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0671
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a memory and a processor coupled to the memory, where the processor is configured to perform various operations. The operations include receiving, in response to a first read input/output operation, a first location of a first data block. The operations also include executing the first read input/output operation at the first data block at the first location. The operations also include selecting a second location within a first search range for destaging a second data block based at least in part on the first location. The operations also include destaging the second data block at the second location upon a determination that a second read input/output operation is not currently executing or queued for execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.