Memory device with read-write-read memory controller
US11056187B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2018 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Feb 21, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory cell array including a plurality of memory cells, each of the plurality of memory cells having a switch element, and a data storage element connected to the switch element and containing a phase-change material; and a memory controller for obtaining first read voltages from the plurality of memory cells, inputting a first write current to the plurality of memory cells, and then, obtaining second read voltages from the plurality of memory cells, wherein the memory controller compares the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.