Data dependent sense amplifier with symmetric margining
US11056208B1 · kind B1 · utility
2Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2020 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Feb 26, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a data dependent sense amplifier with symmetric margining. In particular, the present disclosure relates to a structure including a bias generator circuit that is configured to provide symmetric margining between two logic states of a memory circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.