Integrated circuit devices including vertical field-effect transistors (VFETs)
US11056489B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 7, 2019 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Jun 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices including standard cells are provided. The standard cells may include a first vertical field effect transistor (VFET) having a first conductivity type, and a second VFET having a second conductivity type. The first VFET may include a first top source/drain region, a first channel region, and a first bottom source/drain region. The second VFET may include a second top source/drain region, a second channel region, and a second bottom source/drain region. The standard cells may also include a conductive line that is electrically connected to the first top source/drain region or the first bottom source/drain region and is electrically connected to the second bottom source/drain region. The standard cell may be configured to output an output signal thereof through the conductive line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.