Computer memory mapping and invalidation
US11061816B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 22, 2019 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | Jan 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for computer memory mapping and allocation. In an example, a virtual memory address space is divided into an active half and a passive half. Processors make memory allocations to their respective portions of the active half until one processor has made a determined number of allocations. When that occurs, and when all memory in the passive half that has been allocated has been returned, then the active and passive halves are switched, and all processors are switched to making allocations in the newly-active half.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.