Nonlinear receiver, asymmetric decision feedback equalization circuit and method
US11063790B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2020 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | Jan 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/061
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a non-linear receiver, an asymmetric decision feedback equalization circuit and method, including: converting an optical signal emitted by a laser device into an electrical signal; obtaining a compensation amplitude of a current data in the electrical signal by obtaining an actual amplitude of the current data, and compensating the current data based on a logic value of k prior data of the current data and a feedback coefficient corresponding to the prior data; comparing the compensation amplitude of the current data with a decision threshold to determine the logic value of the current data; the feedback coefficient is an absolute value of an influence amount of the prior data on an amplitude of the current data, and k is a positive integer. The present disclosure can overcome the bit error problem of the receiver and reduce jitter of the clock recovered by the clock recovery circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.