Continuous-time sampler circuits
US11063794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2020 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | Mar 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/257
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.