Prioritized instructions in an instruction completion table of a simultaneous multithreading processor
US11068274B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 15, 2017 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Mar 16, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3889
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A simultaneous multithreading processor is configured to select a first thread of the plurality of threads according to a predefined scheme, and access an instruction completion table to determine whether the first thread is eligible to have a first instruction prioritized. Responsive to determining that the first thread is eligible to have the first instruction prioritized, the simultaneous multithreading processor is further configured to execute the first instruction of the first thread using a dedicated prioritization resource.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.