Shift register, gate drive circuit, display panel, and driving method
US11069272B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 29, 2018 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Feb 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register, a gate drive circuit, a display panel, and a driving method. The shift register includes: an input circuit, which is connected to a pull-up node and an input signal terminal respectively; an output circuit, which is connected to the pull-up node, a clock signal terminal, a direct current signal terminal and an input terminal respectively, wherein the clock signal terminal provides a clock signal, the direct current signal terminal provides a direct current signal, and the output circuit outputs a scanning signal from the output terminal; and an output pull-down circuit, which is connected to the output circuit. The output circuit is configured to output a scanning signal from the output terminal as one from among the direct current signal and the clock signal when a first output condition is satisfied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.