Patent · US Active

Logic circuit

US11070206B2 · kind B2 · utility

0Cited by
6References
14Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 27, 2020
Grant dateJul 20, 2021
Priority date
Expiry dateFeb 27, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/018521
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A logic circuit includes an inverter that outputs from an output terminal a signal created by inverting the logic of a signal input into an input terminal, a first transistor that is connected to the input terminal in such a way as to maintain an OFF state, and a second transistor that is connected to the output terminal in such a way as to maintain an OFF state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.