Array substrate and method of manufacturing the same, display panel and display device
US11073734B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 4, 2020 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Jun 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/121
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes: a base substrate, a gate line extending in a first direction, a data line extending in a second direction, and a pixel electrode layer, the first direction being substantially perpendicular to the second direction, the gate line and the data line defining a plurality of sub-pixel units, and a plurality of first and second common electrode lines electrically connected to each other and disposed in the same layer as the gate lines. The first common electrode line includes two first common electrode line first portions, and the second common electrode line extends in the second direction. The second common electrode line is located between and electrically connects the two first common electrode line first portions. The second common electrode line is located at a center line of the sub-pixel unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.