Patent · US Revoked

Method and apparatus for vector permutation

US11074193B2 · kind B2 · utility

0Cited by
3References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 26, 2019
Grant dateJul 27, 2021
Priority date
Expiry dateAug 26, 2039

Classification

  • Technology area (CPC —)General

Abstract

A method is provided that includes performing, by a processor in response to a vector permutation instruction, permutation of values stored in lanes of a vector to generate a permuted vector, wherein the permutation is responsive to a control storage location storing permute control input for each lane of the permuted vector, wherein the permute control input corresponding to each lane of the permuted vector indicates a value to be stored in the lane of the permuted vector, wherein the permute control input for at least one lane of the permuted vector indicates a value of a selected lane of the vector is to be stored in the at least one lane, and storing the permuted vector in a storage location indicated by an operand of the vector permutation instruction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.