Patent · US Active

Tri-state buffering techniques

US11074945B1 · kind B1 · utility

0Cited by

0References

20Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Rajiv Kumar Sisodia · Bengaluru, IN
Kedhar Malla · Bengaluru, IN
Disha Singh · Kanchinakote, IN

Key dates

Filing date	Mar 2, 2020
Grant date	Jul 27, 2021
Priority date	—
Expiry date	Mar 2, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/108
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are related to a device having a sense amplifier with multiple output ports. The device may include tri-state buffer circuitry having multiple tri-state buffers coupled to the multiple output ports of the sense amplifier. The device may include latch circuitry having multiple latches coupled to the multiple tri-state buffers of the tri-state buffer circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.