Memory refresh technology and computer system
US11074958B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2019 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Oct 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory refresh method is applied to a computer system including a processor, a memory controller, and a dynamic random access memory (DRAM). The memory controller receives a first plurality of access requests from the processor. The memory controller refreshes a first rank in a plurality of ranks at shortened interval set to T/N when a quantity of target ranks to be accessed by the first plurality of access requests is less than a first threshold and a proportion of read requests in the first plurality of access requests or a proportion of write requests in the first plurality of access requests is greater than a second threshold. T is a standard average refresh interval, and N is greater than 1. The memory refresh technology provided in this application can improve performance of the computer system in a memory refresh process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.