Memory device
US11074965B2 · kind B2 · utility
4Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2019 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Dec 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device is disclosed, in which node contacts extend into a substrate, where they are come into electrical connection with active areas. This allows greater contact areas between the node contacts and the active areas and electrical connection of the node contacts with high ion concentration portions of the active areas. As a result, even when voids are formed in the node contacts, the node contacts can still possess desired connection performance. For node contacts allowed to contain voids, this enables them to be fabricated faster with lower difficulty, thus increasing manufacturing throughput of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.