Semiconductor device and method for fabricating the same
US11075204B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2019 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Dec 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
A semiconductor device is disclosed, which comprises a capacitor structure formed over a device region of a substrate, and a buffer layer. The capacitor structure comprises a lower electrode having a U-shaped profile that opens away from the substrate, the U-shaped profile defines an interior surface and an opposing exterior surface; a dielectric liner extending into the U-shaped profile and conformally covering the interior surface of the lower electrode; and an upper electrode formed over the dielectric liner, extending into and filling the U-shaped profile, the upper electrode) includes a top conductive layer. The buffer layer formed on the top conductive layer of the upper electrode, wherein the lattice constant of the buffer layer is greater than that of the top conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.