LDMOS integrated circuit product

US11075298B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Jiehui Shu · Clifton Park, US
• Judson R. Holt · Wappingers Falls, US
• Sipeng Gu · Clifton Park, US
• Halting Wang · Clifton Park, US

Key dates

• Filing date: Jun 27, 2019
• Grant date: Jul 27, 2021
• Expiry date: Aug 3, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/259

Abstract

One illustrative integrated circuit product disclosed herein includes a gate structure positioned above a semiconductor substrate, a source region and a drain region, both of which include an epi semiconductor material, wherein at least a portion of the epi semiconductor material in the source and drain regions is positioned in the substrate. In this example, the IC product also includes an isolation structure positioned in the substrate between the source region and the drain region, wherein the isolation structure includes a channel-side edge and a drain-side edge, wherein the channel-side edge is positioned vertically below the gate structure and wherein a portion of the substrate laterally separates the isolation structure from the epi semiconductor material in the drain region.