Method of fabricating an optoelectronic component
US11075498B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 21, 2020 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Aug 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/32
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating an optoelectronic component within a silicon-on-insulator substrate, the method comprising: providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a silicon base layer, a buried oxide (BOX) layer on top of the base layer, and a silicon device layer on top of the BOX layer; etching a first cavity region into the SOI substrate and etching a second cavity region into the SOI substrate, the first cavity region having a first depth and the second cavity region having a second depth, the second depth being greater than the first depth; depositing a multistack epi layer into the first and the second cavity regions simultaneously, the multistack epi layer comprising a first multistack portion comprising a first active region and a second multistack portion comprising a second active region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.