Electronic component embedded substrate
US11076487B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Jul 27, 2021 |
| Priority date | — |
| Expiry date | Mar 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4644
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic component embedded substrate includes a core structure including a first insulating body and core wiring layers and having a cavity and a stopper layer. An electronic component is disposed in the cavity. The stopper layer includes a first metal layer embedded in the first insulating body and having a portion of an inner surface exposed from the first insulating body, and a second metal layer disposed below the first metal layer and having at least a portion of an upper surface disposed as a bottom surface of the cavity. The cavity has an inner surface of the first metal layer and an inner surface of the first insulating body as a first wall surface and a second wall surface, respectively, and an inclination of the first wall surface is different from an inclination of the second wall surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.