Patent · US Active

Scheduling of work interval objects in an AMP architecture using a closed loop performance controller

US11080095B2 · kind B2 · utility

0Cited by
25References
18Claims
0Family size

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Key dates

Filing dateJan 12, 2018
Grant dateAug 3, 2021
Priority date
Expiry dateJan 12, 2038

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.