Chip on film and display device
US11081441B1 · kind B1 · utility
0Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 5, 2019 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Mar 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/1637
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application provides a chip on film and a display device, the chip on film including a plurality of first source signal lines located at a middle, and a plurality of second source signal lines located at opposite sides, wherein each of the first source signal lines has a cross-sectional area smaller than a cross-sectional area of each of the second source signal lines in a reference plane. Based on the structure, attenuation from the source driver chip to each data lines is substantially the same or even completely the same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.