Cycle accurate skew adjust
US11082034B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2020 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Jan 30, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for cycle accurate deskewing a second clock signal with respect to a first clock signal is provided. The first clock signal has been propagated from a first clock source through a first clock tree. The second clock signal has been propagated from the first clock source through a second clock tree. The second clock tree comprises a programmable delay line for inducing a delay. The method comprises determining a first clock tree latency of the first clock tree, determining a second clock tree latency of the second clock tree, setting a cycle time of the first clock source to a measuring cycle time depending on the first clock tree latency and/or the second clock tree latency, adjusting a skew between the second clock signal and the first clock signal, setting the cycle time of the first clock source to an operating cycle time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.