System and method for application specific integrated circuit design related application information including a double nature arc abstraction
US11087057B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2020 |
| Grant date | Aug 10, 2021 |
| Priority date | — |
| Expiry date | Mar 23, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for application specific integrated circuit design using Chronos Links are disclosed. A Chronos Link is an ASIC on-chip and off-chip interconnect communication protocol that allows interfaces to transmit and receive information. The protocol may utilize messages or signals to indicate the availability and/or readiness of information to be exchanged between a producer and a consumer allowing the communication to be placed on hold and to be resumed seamlessly. A method includes inserting gaskets and channel repeaters connected to interfaces of multiple intellectual property (IP) blocks in order to replace traditional links with Chronos Links; performing simplified floorplanning; performing simplified placement; performing simplified clock tree synthesis (CTS) and routing; and performing simplified timing closure, where timing estimates are based on a double nature arc abstraction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.