Gate driving signal detection circuit, detection method, and display device
US11087655B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 10, 2019 |
| Grant date | Aug 10, 2021 |
| Priority date | — |
| Expiry date | Jun 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving signal detection circuit, a method, and a display device are provided, the gate driving signal detection circuit includes a switch sub-circuit and a test signal line, during a blank time period and an interval time period, the switch sub-circuit controls writing of a clock signal output by a clock signal line into the test signal line; during a output time period of each stage of gate driving signal, when a potential of the gate driving signal is an effective level, the switch sub-circuit controls to establish a connection between a corresponding gate driving signal output terminal and the test signal line, when the potential of the gate driving signal is an ineffective level, the switch sub-circuit controls to disconnect the connection between the corresponding gate driving signal output terminal and the test signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.