Gate driving circuit and display panel
US11087713B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2020 |
| Grant date | Aug 10, 2021 |
| Priority date | — |
| Expiry date | Nov 24, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit and a display panel are provided. The gate driving circuit includes N gate driver on array (GOA) units, wherein the N GOA units are cascaded. An nth-stage GOA unit is any one of the N GOA units. The N GOA units include at least one first GOA unit and at least one second GOA unit. Each first GOA unit and each second GOA unit include pull-up control circuits, bootstrap capacitors, pull-up circuits, pull-down circuits, and pull-down holding circuits. Each second GOA unit further includes a reset circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.