Linear photonic processors and related methods
US11093215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Nov 20, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/0675
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Photonic processors are described. The photonic processors described herein are configured to perform matrix-matrix (e.g., matrix-vector) multiplication. Some embodiments relate to photonic processors arranged according to a dual-rail architecture, in which numeric values are encoded in the difference between a pair optical signals (e.g., in the difference between the powers of the optical signals). Relative to other architectures, these photonic processors exhibit increased immunity to noise. Some embodiments relate to photonic processors including modulatable detector-based multipliers. Modulatable detectors are detectors designed so that the photocurrent can be modulated according to an electrical control signal. Photonic processors designed using modulatable detector-based multipliers are significantly more compact than other types of photonic processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.