Device panel capabilities and spatial relationships
US11094118B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Jan 15, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2219/2004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure provide a system having a memory area associated with a computing device and a processor. The processor executes to classify device panel descriptors and location descriptors according to associated device instances. The processor generates device panel objects using the classified device panel descriptors and location descriptors. A schema comprising device panel locations and adjacency relationship information is populated for the computing device based on the generated device panel objects. The processor provides the populated schema as dynamic device properties to one or more operations executing on the computing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.