Semiconductor device including interconnections having different structures and method of fabricating the same
US11094586B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2019 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Aug 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54426
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method of fabricating a semiconductor device, the semiconductor device including a semiconductor substrate including a first region and a second region; an interlayer insulating layer on the semiconductor substrate, the interlayer insulating layer including a first opening on the first region and having a first width; and a second opening on the second region and having a second width, the second width being greater than the first width; at least one first metal pattern filling the first opening; a second metal pattern in the second opening; and a filling pattern on the second metal pattern in the second opening, wherein the at least one first metal pattern and the second metal pattern each include a same first metal material, and the filling pattern is formed of a non-metal material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.