Semiconductor device including contact structure
US11094593B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2018 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Oct 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0188
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.