Variable resistance memory device and method of fabricating the same
US11094745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2019 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Sep 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
A variable resistanvce memory device may include a plurality of first conductive lines extending in a first direction, a plurality of second conductive lines extending in a second direction, a plurality of memory cells, each memory cell at a respective intersection, with respect to a top down view, between a corresponding one of the first conductive lines and a corresponding one of the second conductive lines, each memory cell comprising a variable resistance structure and a switching element sandwiched between a top electrode and a bottom electrode, and a first dielectric layer filling a space between the switching elements of the memory cells. A top surface of the first dielectric layer is disposed between bottom and top surfaces of the top electrodes of the memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.