Drain extended NMOS transistor
US11094817B2 · kind B2 · utility
1Cited by
19References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Jan 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a local oxidation of silicon (LOCOS) structure and a shallow trench isolation (STI) structure formed over a semiconductor substrate. A source region is located between the LOCOS structure and the STI structure. A gate structure is located between the source region and the LOCOS structure. A contact may be located over the STI structure electrically connect to the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.