Power factor correction circuit with burst setting and method of operating the same
US11095207B1 · kind B1 · utility
2Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Apr 27, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power factor correction circuit with burst setting includes a conversion circuit, a control unit, and a burst setting circuit. The burst setting circuit respectively sets at least one burst period when an input power source is at a rising edge of a positive half cycle, a falling edge of the positive half cycle, the rising edge of a negative half cycle, and the falling edge of the negative half cycle, and provides a burst setting signal corresponding to the at least one burst period to the control unit so that the control unit limits the conversion circuit to perform a burst operation during the at least one burst period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.