Single-ended to differential circuit
US11095303B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Jun 30, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45616
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single-ended to differential circuit is presented. The circuit may be a single-ended to differential integrator or a single-ended to differential amplifier. The circuit determines a first output and a second output voltage based on an input voltage, first and second reference voltages. The circuit has a first, a second and a third input memory element. The circuit in a first phase, samples a voltage indicative of the input voltage on the first input memory element. The circuit in the first phase, samples a voltage indicative of the first reference voltage on the second input memory element. The circuit in the first phase, samples a voltage indicative of the second reference voltage on the third input memory element. The circuit, in a second phase, determines the first and second output voltage based on the sampled voltages on the first, second, and third input memory elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.