Circuit concealing apparatus, calculation apparatus, and program
US11095429B2 · kind B2 · utility
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32Claims
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Key dates
| Filing date | Nov 9, 2017 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Apr 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/46
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
At least any one of input keys KA0, KA1, KB′0, and KB′1 is set so that the input keys KA0, KA1, KB′0, and KB′1 which satisfy KA1−KA0=KB′1−KB′0=di are obtained, and an output key Kig(I(A), I(B)) corresponding to an output value gi(I(A), I(B)) is set by using the input keys KA0, KA1, KB′0, and KB′1, where input values of a gate that performs a logical operation are I(A), I(B)∈{0, 1}, an output value of the gate is gi(I(A), I(B))∈{0, 1}, an input key corresponding to the input value I(A) is KAI(A), and an input key corresponding to the input value I(B) is KB′I(B).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.