Differential signal processing device using advanced braid clock signaling
US11095484B2 · kind B2 · utility
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6References
16Claims
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Key dates
| Filing date | Mar 13, 2020 |
| Grant date | Aug 17, 2021 |
| Priority date | — |
| Expiry date | Mar 13, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/493
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A differential signal processing device is described which includes an encoder configured to encode input data into one or more differential signals and a transmitter configured to sequentially transmit the one or more differential signals using a plurality of transmission lines. The encoder converts a plurality of bits, corresponding to a transmission time interval, among the input data into an encoding code array in the transmission time interval obtained by increasing an encoding unit time, encoded for each of the one or more differential signals, by an integer multiple.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.