Patent · US Active

Compact semiconductor chip system and method

US11096284B2 · kind B2 · utility

0Cited by
0References
16Claims
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Assignee

Inventors

Key dates

Filing dateJun 25, 2019
Grant dateAug 17, 2021
Priority date
Expiry dateJun 25, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K2201/10545
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device and associated methods are disclosed. In one example, a processor die is coupled to a first side of a package substrate, and a memory die coupled to a second side of the package substrate. A system accelerator die is further coupled to the package substrate. In selected examples, the system accelerator die provides performance improvements, such as higher cached memory speed and/or higher memory bandwidth.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.