Coherency maintenance via physical cache coordinate comparison
US11099989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2019 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Jul 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Utilizing physical cache address comparison for maintaining coherency. Operations are performed on data in lines of a cache of the computing system and virtual addresses are loaded into a cache controller. The virtual addresses correspond with lines associated with performing the operations. A physical address of a line is determined in response to having performed a first cache directory lookup of the line. The physical address from the first operation is compared with other physical addresses associated with other operations to determine whether the other operations utilize the same physical address as the first operation. In response to matching physical locations, determinations are made as to whether a conflict exists in the data at the physical addresses that match. Thus, the coherency maintenance is free from looking up virtual addresses to determine whether the line of the cache includes incoherent data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.