Programmable I/O switch/bridge chiplet
US11100028B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2020 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Apr 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flexible standards-based bridge or switch chiplet facilitates heterogeneous integration of chiplets that support different physical layer (PHY) interfaces and communication protocols. The bridge chiplet is configured with multiple PHY interfaces and associated adapter logic and translation logic for translation between different PHY interfaces and protocols. The bridge chiplet can be programmed to serve as a die-to-die interconnect bridge that routes data between multiple chiplets supporting different PHYs and interconnect protocols. Some embodiments of the bridge chiplet can serve solely as a PHY bridge, while others may serve as a bridge for both PHYs and protocols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.