Memory system, semiconductor integrated circuit, and method therefor
US11100031B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2020 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Mar 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4295
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a first nonvolatile memory, a first bridge circuit connected to the memory, a second nonvolatile memory, a second bridge circuit connected to the second memory and connected to the first circuit, and a controller connected to the first circuit and configured to output, to the first circuit, first data to be stored in the first memory and second data to be stored in the second memory, the first and second data being mapped to multiplexing symbols. The first bridge circuit is configured to, upon receipt of the multiplexing symbols, extract the first data from the symbols, store the first data in the first memory, generate third data based on the second data to insert the generated third data into the multiplexing symbols where the first data was mapped, and output to the second circuit the multiplexing symbols into which the third data has been inserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.