Impedance matching network and method
US11101110B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2020 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Jul 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present disclosure may be directed to an impedance matching network that includes an electronically variable capacitor (EVC). The EVC includes discrete capacitors and corresponding switches, each switch configured to switch in and out one of the discrete capacitors to alter a capacitance of the EVC. The switches are operably coupled to a power supply providing a blocking voltage to the switches. A control circuit determines a blocking voltage value of the power supply. Upon determining the blocking voltage value is at or below a predetermined first level, the control circuit causes a limited altering of the capacitance of the EVC, the limited altering limiting the number or type of discrete capacitors to switch in or out based on the extent to which the blocking voltage value is at or below the first level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.