Semiconductor device and manufacturing method thereof
US11101143B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2019 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Dec 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an isolation insulating layer disposed over a substrate, a fin structure disposed over the substrate, and extending in a first direction in plan view, an upper portion of the fin structure being exposed from the isolation insulating layer, a gate structure disposed over a part of the fin structure, the gate structure extending in a second direction crossing the first direction, and a source/drain structure formed on the upper portion of the fin structure, which is not covered by the gate structure and exposed from the isolation insulating layer. The source/drain structure includes a SiP layer, and an upper portion of the source/drain structure includes an alloy layer of Si, Ge and Ti.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.