Patent · US Active

Wafer-scale membrane release laminates, devices and processes

US11101158B1 · kind B1 · utility

2Cited by
2References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 8, 2018
Grant dateAug 24, 2021
Priority date
Expiry dateSep 1, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2221/68381
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The disclosed subject matter relates to techniques, laminates and devices used to fabricate thin dielectric or semiconductor membranes including a handling substrate including a photoresist material on a first surface thereof, a semiconductor wafer having a circuit pattern on a first surface and a second surface to be processed and a temporary adhesive layer temporarily bonding the first surface of the semiconductor wafer to the first surface of the handling substrate including the photoresist material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.