Patent · US Active

Multi-level buck converter capable of reducing component stress

US11101734B2 · kind B2 · utility

2Cited by
0References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 13, 2020
Grant dateAug 24, 2021
Priority date
Expiry dateMar 13, 2040

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A multi-level buck converter includes an input power source, an input capacitor, first to fourth switches, a clamp capacitor, an output inductor, a clamp switch, a clamp diode, an output capacitor, an output load, a current detection circuit, a voltage detection circuit and a control circuit. The current detection circuit detects whether an inductor current of the output inductor exceeds a predetermined current value, and if so, the output clamp signal controls the clamp switch to be turned on. The voltage detection circuit generates a duty cycle control signal according to an error between an output voltage and a target output voltage. The control circuit controls the first to the fourth switches to sequentially enter a first mode, a second mode, a third mode, and a fourth mode in a first part of a duty cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.