Patent · US Active

Phase-locked loop (PLL) circuit

US11101807B2 · kind B2 · utility

0Cited by

2References

14Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Erhan Ozalevli · Dallas, US
Mustapha El Markhi · Richardson, US
Tuli Dake · Plano, US

Key dates

Filing date	Dec 11, 2018
Grant date	Aug 24, 2021
Priority date	—
Expiry date	Dec 11, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH03K3/0231
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

One example includes a phase-locked loop (PLL) circuit. The circuit includes a frequency divider and phase detector configured to generate a plurality of non-overlapping switching signals based on an input signal and a PLL output signal. The circuit also includes a linear frequency-to-current (F2I) converter configured to generate a control current having an amplitude that is based on the plurality of non-overlapping switching signals. The circuit further includes a linear current-controlled oscillator configured to generate the PLL output signal to have a frequency and phase to be approximately equal to the input signal based on the amplitude of the control current.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.