Data writing method, memory control circuit unit and memory storage apparatus
US11101822B1 · kind B1 · utility
1Cited by
1References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 13, 2020 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Aug 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1068
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data writing method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: receiving first data and second data from a host system; generating a first array error correcting code based on the first data, and generating a second array error correcting code based on the second data; programming a first group including the first array error correcting code into a first chip enable group by using a first programming mode; and programming a second group including the second array error correcting code into a second chip enable group by using a second programming mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.