Method for addressing an integrated circuit on a bus and corresponding device
US11106618B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 2020 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Jun 22, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method can be used for addressing a slave integrated circuit connected to a bus. The slave integrated circuit has a default address on the bus. The method includes receiving, at the slave integrated circuit, an addressing message conveyed on the bus. The addressing message contains a replacement address. The method also includes replacing the default address within the slave integrated circuit with the replacement address upon receiving the addressing message, restarting the slave integrated circuit, and upon the restarting, assigning the replacement address as a new default address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.