Packaging for lateral high voltage GaN power devices
US11107755B2 · kind B2 · utility
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22Claims
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Inventors
Key dates
| Filing date | May 10, 2020 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | May 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Packaging methods and structures for lateral high voltage gallium nitride (GaN) devices achieve electrical isolation while also maintaining thermal dissipation. The electrical isolation reduces or eliminates vertical leakage current, improving high voltage performance. The packages may use or be compatible standards such as JEDEC, which reduces packaging cost and facilitates implementation of the packaged devices in conventional circuit design approaches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.