Array substrate, manufacturing method thereof, and display panel
US11107843B2 · kind B2 · utility
1Cited by
2References
12Claims
0Family size
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Key dates
| Filing date | Oct 9, 2017 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Oct 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a substrate, a dual-gate oxide thin film transistor TFT, an electrode for display and a polycrystalline silicon TFT. The dual-gate oxide thin film transistor TFT and the electrode for display are located in a sub-pixel on the substrate, and a drain electrode of the dual-gate oxide TFT is electrically connected to the electrode for display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.