Technologies for controlling jitter at network packet egress
US11108697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2018 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Dec 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Technologies for controlling jitter at network packet egress at a source computing device include determining a switch time delta as a difference between a present switch time and a previously captured switch time upon receipt of a network packet scheduled for transmission to a target computing device and determining a host scheduler time delta as a difference between a host scheduler timestamp associated with the received network packet and a previously captured host scheduler timestamp. The source computing device is additionally configured to determine an amount of previously captured tokens present in a token bucket, determine whether there are a sufficient number of tokens available in the token bucket to transmit the received packet as a function of the switch time delta, the host scheduler time delta, and the amount of previously captured tokens present in the token bucket, and schedule the received network packet for transmission upon a determination that sufficient tokens in the token bucket.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.