Compact, low power, high resolution ADC per pixel for large area pixel detectors
US11108981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2019 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Oct 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N23/30
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A compact ADC circuit can include one or more comparators, and a serial DAC (Digital-to-Analog) circuit that provides a signal to the comparator (or comparators). In addition, the ADC circuit can include a serial DAC redistribution sequencer that can provide a plurality of signals as input to the serial DAC circuit and is subject to a redistribution cycle and which receives as input a signal from a data multiplexer whose input connects electronically to an output of the comparator. The circuit can further include an ADC code register that provides an ADC output that connects electronically to the output of the comparator and the input to the data multiplexer. Shared logic circuitry for sharing common logic between pixels can be included, wherein the shared logic circuitry connects electronically to the data multiplexer and the ADC code register, wherein the shared logic circuitry promotes area and power savings for the pixel detector circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.